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Estatística
Título: FSK DEMODULATION USING FPGA
Autor(es): RUDAH MACIEL GUEDES
Colaborador(es): MARCO ANTONIO GRIVET MATTOSO MAIA - Orientador
Catalogação: 25/JUN/2015 Língua(s): PORTUGUESE - BRAZIL
Tipo: TEXT Subtipo: SENIOR PROJECT
Notas: [pt] Todos os dados constantes dos documentos são de inteira responsabilidade de seus autores. Os dados utilizados nas descrições dos documentos estão em conformidade com os sistemas da administração da PUC-Rio.
[en] All data contained in the documents are the sole responsibility of the authors. The data used in the descriptions of the documents are in conformity with the systems of the administration of PUC-Rio.
Referência(s): [pt] https://www.maxwell.vrac.puc-rio.br/projetosEspeciais/TFCs/consultas/conteudo.php?strSecao=resultado&nrSeq=24819@1
[en] https://www.maxwell.vrac.puc-rio.br/projetosEspeciais/TFCs/consultas/conteudo.php?strSecao=resultado&nrSeq=24819@2
DOI: https://doi.org/10.17771/PUCRio.acad.24819
Resumo:
FSK modulation is widely used for digital transmission of data in several areas. In the case of oil transport ducts, monitored by sensors, the transmission system has physical limitations such as, high temperatures and high pressure. Due to these limitations, the system is restricted to simpler transmission methods, like binary FSK (BFSK) modulation. It is therefore fundamental that the receptor system is able to perform an efficient demodulation. Among the possible methods that could be considered for the task, the Goertzel algorithm was chosen. This algorithm can implement a narrow band-pass filter over the input signal, identifying the presence or the absence of a frequency’s component. In this context, the Field Programmable Gate Array (FPGA) represents a robust low-cost solution for the FSK signals demodulation – through the Goertzel algorithm – mainly because of the possibility of parallelizing the digital structures that makes the algorithm’s execution faster. For the application of the algorithm in the FPGA, floating-point sum and multiplication units were developed. This approach is fast – 1 clock cycle for the multiplication and 4 clock cycles for the sum – but expensive in terms of the FPGA’s available resources. It was observed that, through the use of an analog-digital converter that works on a 500k samples per second rate in the receptor station and a transmitter operating at a 2500 bits per second rate, the application of the Goertzel algorithm in the FPGA with floating-point operations was effective. This presented a null error rate in the BFSK demodulation of frequencies between 5 kHz and 200 kHz.
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