Error-correcting codes are fundamental pieces of modern telecommunications systems. Through their usage, data can be transmitted through noisy channel without noise-induced errors making the whole transmission unviable. In digital systems, these codes are composed by a set of bits associated with the transmitted data, and sent right along with them. These bits contain mathematical properties which allow given a limited number of wrong received bits, detect and, in some cases, correct these errors. When embedded in FPGAs (field-programmable gate arrays), a single integrated circuit can contain the necessary logic to encode and/or decode messages with error-correcting codes as also include other logic pertinent to the desired application. In this work, we develop an encoder and a decoder for the extended binary Golay code in VHDL for FPGA implementation.